Thanks! Yes, there are some issues with the S-100 68K CPU board. I don’t think they’ll have an effect on functionality but do need some clean up.
The over pours near the top of the connector pads should not be an issue since the pads are significantly bigger than the connector wipers. However I see a couple of traces and vias migrated down into the connector.
Normally I hand route those away from the connector. I’ve done that many times already with this board but during the last optimization they must have reappeared. Still they shouldn’t affect functionality but it is not good practice.
Most likely there will be updates to the board and during the next respin we can clean up the minor trace anomalies.
Please post your progress on the board. I am really looking forward to seeing how this board finally matures!
Thanks and have a nice day!
From: n8vem...@googlegroups.com [mailto:n8vem...@googlegroups.com] On Behalf Of yoda
Sent: Thursday, April 18, 2013 10:27 PM
Subject: [N8VEM-S100:1551] S100-68K-V3
I have received said boards and just a couple of things to be aware of. It looks like there are some "over pours" of copper near the connector fingers which appear not to short but could possibly short when plugged into the S100 bus so please be careful to check this. If there is a future production run of these boards the gerber files should be cleaned up - I did not notice in the original files but it is pretty obvious when you look at the real boards and this appears on both sides of the boards.
Another fix in the future would be to put the resistor number on the silk screen not the value, ie, R1 instead of 2200 - it makes it harder if there is a need to do debugging and you want to probe at a specific resistor it is hard to know which one is which when referring back to the schematics or vice versa.
I am starting to put together one of the boards and hope to be able to do bring up some time this weekend. I plan to use initially in bus master mode. I think I understand all the jumpers that need to be made and will post a bus master jumper configuration once I have a working board. I have a V1 board that is working so that should aid in getting this board running,
From there I plan on finishing a BIOS for CP/M 68k and will publish that when working. I plan to write the BIOS and monitor code using GCC cross compiler and 95+ per cent of the code should be in C with very little assembly code needed. I have tested some of the code and it is working. I have been waiting for this board to finish as I want to locate the stack disk buffer on the on board RAM away from main memory. There were some issues with V1 that did not allow the on board memory to work without some surgery to the board.
Will post pictures, jumpers and code when I get a little further
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