Drive selection is achieved using a D Type flip flop (U16A) where the data input is data line DO0, this data line is clocked into the flip flop through the combined SEL_SECOND* and WR* signals thorough NOR gate U15A. you need to be looking in this area with a logic probe/ logic analyser to see if the pulses are generated when you address the port.
One other possibilty which springs to mind is , Have you jumpered K1 (reset jumper) or is it floating. U16A uses the reset line to initialise the flip flop output Q (pin 5) to low and thus illuminating D18 (CF-A SELECT).
Please make sure you are using the schematic dated 23/3/2014
On Tuesday, March 18, 2014 10:27:41 PM UTC, Edward Snider wrote:
Is anyone interested in getting one or more of these?
Just post here and I'll get a list started.