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Re: [N8VEM-S100:1497] S-100 board reorders

Thank you so much for all your work.
I really appreciate your explanation of the process.
----- Original Message -----
Sent: Sunday, March 10, 2013 10:35 AM
Subject: RE: [N8VEM-S100:1497] S-100 board reorders

Hi Bill!  Thanks!  I use KiCAD for schematic capture and PCB layout.  I use FreeRouting.net for the PCB trace routing and optimization.  All of the PCB design information *including the tool chain* is completely open source/free software except for FreeRouting.net which is *free to use* but not open source/free software.


The general PCB design process is to design a schematic for your design (CPU board, IO board, etc) and capture it in KiCAD.  Make sure it has all the compatible connections and passes Electrical Rules Check.  Then generate a network file of all the connections, assign footprints to the parts, and then layout the PCB. 


I layout the PCBs to minimize the overall length of connections and minimize the number of vias.  Basically that?s just grouping like components in a circuit together.  For example, start with the bus interface and place what components are directly connected to it, then which are connected to those, and so on.  Sometimes I start with the CPU and work outwards but generally speaking it is a balance between the core component (IO device or CPU) and the bus interface.


The trace route optimization can take days to months depending on the design and how rigorously it is optimized.  The time required scales exponentially with circuit complexity.  For example a simple circuit like the SCSI-1 to IDE/SD bridge will only take days for robust optimization.  However the S-100 68K V3 CPU board has been redesigned multiple times and has been in trace route optimization for more than two years.


Trace route optimization is a different process than hand routing or autorouting the PCB traces.  Optimization starts with a completed PCB trace route and seeks new alternative routes to shorten overall trace length and the number of vias.  I can usually get an unoptimized PCB trace routed by hand or by autorouter in a day or so. 


The problem with unoptimized PCB trace layouts, even manual ones, is they generate some very long and complex trace lengths that can screw up timing.  Trying to debug an unoptimized PCB layout is much more difficult since it is so hard to separate logical problems from trace related anomalies.  I usually do a mix of manual and autorouted PCB trace layouts.


As a related side issue, there is a major limitation IMO to free/open source hobbyist PCB design because FreeRouting.net is free to use but not Free/Open Source software.  Without a PCB autorouter we are left with only manual PCB routing and manual optimization.  There have been multiple requests to the FreeRouting.net author to open up his code but due to pre-existing commercial licensing relationships that is just not possible.  That?s not a criticism of FreeRouting.net and I appreciate all they?ve done but it is still a huge issue for hobbyist PCB design projects.


If you or anyone else is interested in helping the hobbyist PCB design community, please consider contributing effort to the QAutorouter project.  It is porting the gEDA autorouter code into a standalone tool set builders can use to manually trace route, autoroute, and optimize PCB traces.  Mike Sharkey (on this list) is the main author.  Strategically, this is the most important hobbyist project any builder could be working on since it lays the foundation for a completely free/open source EDA toolset which would benefit *all* projects.  This is a pure software development issue and a great opportunity to make a lasting contribution.




Thanks and have a nice day!

Andrew Lynch