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Running a 80486 On the S-100 Bus

For those that have been following Andrew and my efforts to construct new and exciting S-100 bus boards I would just like to present an brief update on our 80386 prototype board. 

In 1992 Cyrix introduced the 80486DLC.  It was their first serious entry into the mainstream X86 market, and made possible many people's first taste of 486 performance.   It was 100% pin compatible with the Intel/AMD 80386.  The 486DLC can be described as a 386DX with the 486 instruction set and 1 KB of on-board L1 cache.  The 80386's had no on-board cashes.  It does not have a math coprocessor however.  

Anyway I managed  to obtain off eBay a 33MH version and popped it on the board.   I found that the board could not attain the 32MHz of the AMD 80386-40 chip but worked fine at 27MHz (the next lowest oscillator I happen to have).   Interestingly however even at 27MHz it ran MSDOS software about 10% faster than the 80386 chip at 32MHz.   I am currently looking out for a faster Cyris chip as 33MHz may be too close to the limit of the current chip.
A picture of the board with the 80486DLC chip can be seen here:-
near the bottom of the page.

BTW as far as I know this is the first published instance of an 80486 on the S-100 bus. I know the DLC was a poor man's 80486, but they were always impressive sides by side with the same clock speed 80386.   Don't worry, a "real 80486" CPU board is in the planning stages!