Hi John! Thanks!
The Teeside assembler is PC based (MSDOS) so you can cross-assemble
There is some CP/M 68K system documentation here
Unfortunately there does not appear to be CP/M 68K System Alteration Guide AFAIK
Without a sample CBIOS though creating one from scratch using an assembler sounds difficult and time consuming.
Maybe Pontus can help us break out of this “catch-22”
Thanks and have a nice day!
Thanks Andrew. Saw the “CPM68K Source code” however that code is in C and as best I can tell needs an running 68K system to put it together. I suppose we could look for a cross compiler, linker etc. setup but those kind of things quickly unravel. I was hoping for a CPM86 like image setup where one just gets a BIOS shaped up and somehow “splices” it into a CPM68K image.
Enlarging the basic monitor I wrote (or even the much larger Motorola TUTOR code) to include sector read/writes is not hard/a problem, its splicing it on to a CPM68K OS core I’m trying to figure out.
John Monahan Ph.D
Hi John! Pontus helped us with the initial S-100 68K CPU board. He ported TUTOR 1.3 and I think at least started some work on CP/M-68K.
There are disk images in the CPM-68K folder under the S-100 68K CPU board directory.
Also there is a CP/M-68K source code archive here
NEW 08/17/2002 CP/M-68K 1.0x SOURCES : 4.46M A collection of C sources for CP/M-68K, apparently for versions 1.01, 1.02, 1.02a, and 1.03.
There are some BIOS/BDOS/CCP sources in here, but all seem to be revisions of version 1.1 of the OS.
1. "The Pascal version of CP/M-68K..." (cpm0706.rno)
2. "Allows up to 8Gb of on-line disk(ette) storage" (pdd.rno)
3. "CP/M-68K Alpha Release III 2/15/84" (a3.rno)
CP/M-68K 1.2 SOURCE : 518K C source for CP/M-68K version 1.2.
NEW 08/17/2002 CP/M-68K 1.2 SOURCES : 719K CP/M-68K 1.2 from 03/20/1983 (C sources). Archive contains 12 disk images in RAW format (IMG).
NEW 08/17/2002 CP/M-68K programs : 157K Collection of programs and utilities for CP/M-68K (sources in C language).
Unfortunately we never made it this far with the S-100 68K CPU board. However since you have one working if you want to take on this project all the pieces are available.
Please let me know what I can do to help. Thanks and have a nice day!
Thanks John for blazing the trail. I guess I will wait until you get your ECB board BIOS done and have “spliced it into a working generic CPM68K version”. I have not located the latter yet. I seem to remember Godbout had 8” disks for one on his FDC boards . Will start looking.
On the Z80 interrupts, I actually went with a simple 8 bit IC/Switch approach for the Z80 on the PIC-RTC board.
Mode 2 is real nice on the Z80 once you get it working. The 8259A works real nice on all the Intel/AMD chips but I agree for the Motorola family it’s far from optimum. The NS32202 (or AMD9519) are better more generalized choices for non-Intel CPU’s.
John Monahan Ph.D
I pointed you at the BIOS docs first, since the S-100 system is quite a bit different from the ECB board suite. Compatibility at the BIOS level would simplify the implementation of CP/M-68, since 16-bit (S-100) CP/M is going to be the same as 8-bit (baby ECB) CP/M.
Thanks John. Unfortunately I am a little confused where to go from there.
I think I can write code to do console I/O and talk to the dual IDE board
(with CF cards) but how do I splice this BIOS into the generic CPM68K. Where
do you have that.
I have not begun to work on CP/M-68. This BIOS should have the basic console I/O calls, and disk I/O calls needed for any OS. CP/M is probably the easiest to get running; but I am open to other OS suggestions.
BTW could I run the system using an Intel 8259A is "read status mode" from a
Working with the 8259A on a Z80, I totally gave up trying to vector interrupts in mode 2. That is why I moved to the NS32202 interrupt controller. On the MF/PIC board, with the "configuration register" this controller will cause the board to give interrupt responses compatible with the MC68000 family, Z80 (IM 2), and Z80 (IM 0). All 3 of these modes of operation have been tested.
As you know the 8259A in it's native Intel mode puts the
Int vector directly on the bus only after 3 INTA signals. However if we just
trigger one the 68K Int pins we can just read the 8259A status and get
appropriate S100 Int (1-7). Slower but at least generalized.
The NS32202 PIC with the MF/PIC board circuitry does this all in hardware. It can be programmed to use 8 sequential Trap Vectors on the 68000, starting at an appropriate address.
John Monahan Ph.D
Behalf Of John Coffman
Sent: Friday, December 23, 2011 4:44 PM
Subject: Re: [N8VEM-S100:566] S-100 68K CPU board status
Start at http://n8vem-sbc.pbworks.com/
Under the tab "Pages & Files", folders to traverse are:
1 Board Information
2 ECB Processor Boards
3 ECB Baby 68000
direct link board description:
4 BIOS ROM images
direct link BIOS docs:
Bios 8 is the latest posted.
On 12/23/2011 02:10 PM, John Monahan wrote:
John could you direct me to the most relevant URL for the ECB babyM86K Thanks John