Darn, its indeed frustrating I/we did not notice this chip before now. Thanks for pointing it out Ian. Looking at the pin-outs, it's not too big a job to add the latching of the higher address lines with data from the 8 bit data bus. In fact WD give an example in their data sheet. Many of the other pins remain the same though I have not looked at the timing signals in detail. The fact it comes up as a 65C02 is also nice. See data sheet attached. To me the issue is how many people would really like to have/use an S-100 board with this chip. One of the reasons we did the 6502 to start with was somebody (sorry forgotten who) wanted to do a CPM like OS with the chip. Not sure if that is still the plan. I wrote a small 6502 monitor for the onboard EEPROM (from scratch), got to say it was a frustrating experience. Just could not get used to using the 8 bit only registers for RAM addressing etc.. The lack of some instructions and strange flags behavior did not help , just me I'm sure (been Intel brought up). Anyway if there is a decent number of people that would use the chip I would be prepared to do another prototype round. If not, I suggest we kind of lay this 65C02 to rest with the proposed production board and focus on other (more common) 16 and 32 bit CPU's for now. Comments welcome John John Monahan Ph.D e-mail: mon...@vitasoft.org Text: mon...@txt.att.net -----Original Message----- From: n8vem...@googlegroups.com [mailto:n8vem...@googlegroups.com] On Behalf Of Ian May Sent: Tuesday, August 07, 2012 1:20 AM To: n8vem...@googlegroups.com Subject: Re: [N8VEM-S100:1029] A new S-100 6502 CPU Board Hi John, you are probably too far down the design path for the new board to change CPU now. What I was suggesting was using the W65C816S instead of a 6502. At reset the W65C816S behaves exactly like a 6502 but when you switch to native mode it turns into a 24 bit addressing machine with 16 bit index registers and accumulator. The program counter is still 16 bits, the extra 8 address bits come from the program bank register. To get beyond the bottom 64K there are JMP and JSR instructions that have 24 bit address operands (much like far calls on an 8086). There is a data bank register that generates the top 8 address bits for data instructions. Jameco has them for $7.95 versus $6.95 for the W65C02 so the price difference isn't much. Unfortunately the W65C816S is not pin compatible with the 6502 so you can't drop it in later. If you were to use the W65C816S you would have a board that behaves exactly like a 6502 but has the ability to transform into a machine capable of natively generating 24 bit addressing without messing around with external page registers. In hindsight I should have mentioned the W65C816S when you announced the first 6502 S100 board. Cheers, Ian.
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