Yes, I'm going with 0.040 holes. Here's a picture of the final design. The majority of the board is for prototyping. If you don't want to use the buffer chips, you can ignore them and go for the signals available on the pins. The bottom holes outlined in the silk screen are connected to the S-100 bus, but you can easily cut traces if you want to set those holes free to the sea. There is the option to use the 12V and -12V regulators, or you can ignore those and use the pads around that area. I moved the 5V for the LED and removed the DB9.
The +8V, +/-16V traces all have fusible links, these links are rated 2Amps for 8V and 1Amp for 16V and will hopefully save the entire trace and the gold finger from damage. All chips are 74LS245. I might just add grid letters and numbers to the silk screen layer, otherwise, this is the design. There is a single pad with 5V along the top, intended for an LED with a resistor towards the ground pad to the left. Optionally, you can use this pad for VCC power, but it's only a 0.012" trace supplying power. Enough for a row of TTL. Power and ground are also available from pads on the right side. Finally, I have checked 3 times the connection between S-100 and the Buffer chips. The buffer chips are all wired for a peripheral board (Memory, I/O, etc), only the Data IN/OUT buffers must get driven with a chip enable function. If the default signals are not desired, they can be changed by breaking the small 0.008" traces which are all on the bottom of the board.
How does it look?
Date: Tue, 4 Mar 2014 09:23:23 -0500
Subject: Re: [N8VEM-S100:2640] Mini buffered Prototyping board available.
De we get to find out the Final Clearance configuration/layout :->?
On Tue, Mar 4, 2014 at 9:19 AM, Fabio Battaglia <hkzl...@gmail.com> wrote:
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