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A MSDOS PC-AT Style S-100 Support Board
  Final Board2
   
  V3 MSDOS Support Board
    
INTRODUCTION 
One of the better features of the IBM-PC and its clones is the fact that the hardware is almost identical in all the systems anywhere in the world. Even different manufacturers used the same 8259A Interrupt controller (PIC), and 8254 timer etc., as well as the IBM designated ports in their own systems.  This continued on with the introduction of the IBM-AT system and continues even to this day in the highly integrated chip sets of our current PC motherboards.    This uniformity of the supporting CPU chip sets for Intel/AMD based PC's makes writing a ROM based BIOS and supporting disk operating system a little easier.  If you get the ROM BIOS correct the underlying software should not know it is not running on a standard IBM-AT.   Indeed for a very long time that was the basic requirement for Microsoft's MSDOS operating system.

Clearly I would be nice to have an S-100 board that would emulate an IBM-AT box for any 8086, 80286, 80386 etc. CPU we put in our system.  However there is one complication. In the PC-AT,  IBM added a Real Time Clock Chip (RTC) that allowed convenient time/date stamping of files. They used a Motorola CMOS MC146818 chip.   This chip also contained a small amount of non-volatile RAM that retained its contents (via a battery backup) when the power was switched off.   Today with gigabyte NAND memory it's hard to relate to this tiny improvement, but this CMOS RTC RAM was quiet useful in storing certain BIOS boot up variables.   In most AT clones that chip was replaced by a Dallas Semiconductor CMOS RTC chip that contained more RAM.  Over time, various RAM locations on the RTC essentially became standards for disk operating systems and other software.  It would be nice to have it in our S-100 systems.

Now we already have a good S100Computers PIC-RTC board. Well tested and very reliable in both 8 and 16 bit systems. Unfortunately however, that boards RTC chip (a 58167A), does not contain any available RAM as described above.

I decided to try and put together a kind of "catch all" S-100 board that would cleanup some loose ends need to easily run MSDOS on an S-100 system and with our future CPU boards.  Here is what I could fit on one S-100 board.

8259A PIC
First of course we need an 8259A interrupt controller. The PC had one, the AT has a second one acting as a slave to the first.  I considered doing the same for this board, however because the S-100 bus only has 8 interrupt lines and because we don't need some of the interrupts the AT motherboard uses (see below) I decided to stick with one.  The chip is hard wired to ports 20H and 21H -- ports almost ever PC 8259A in the world has is hard wired to!

One very useful feature I found on the PIC-RTC board was the LED bar that stretched any one of the eight S-100 bus interrupt pulses out to a visible light flash.   I added this useful debugging feature to our MS-DOS board.

CMOS DS12887 RTC
This is the most important component on the board. This chip is 100% software compatible with the PC-AT CMOS RTC chip. A detailed description of the chip can be obtained here.  On all PCs the RTC is on IO ports 70H and 71H. This is hard wired as such into our board.

8254 Timer
All PC's use this timer. Its kind of underutilized though. A detailed description of the chip can be obtained here.  Of the 3 timers on the chip, one is used for the system tick. Another is used to generate sound on a small speaker. The speaker is driven by a 75477 chip.  I added both chips to our MSDOS Board.  The PC uses an unusual clock frequency (1.193MHz) to drive the timer.   I generated this frequency using a common 14.318 MHz TV oscillator and a 74LS92 divide by 12 counter.  The counters can be configured to trigger any one or the S-100 bus interrupt lines (as on the PC).



EEPROM Circuit
For 8086 boards that do not have (or have a limited) an onboard boot ROM capability, I added two sockets and support circuitry to support 28C64 and 28C256 EEPROMS.   Again we already have a RAM/EPROM S-100 board that could be used. However that board is fairly complex, difficult to configure and has a slower access time because it can accommodate 8 bit ROMS, and/or 16 bit ROMS and/or RAM.   The EPROM circuit on this MSDOS support board is very simple with a fast access time (i.e. few wait states are required).  The EEPROMs can be located anywhere in the S-100 address space so they could be used for video or network card drivers. The 8086 Monitor/IBM BIOS has code to detect them as on  a PC.

Two Wait State Circuits
The board has a wait state circuit for the above dual 16 bit wide EEPROMS. From 0 -8 wait stares can be added for any CPU access.
However the board has a second wait state circuit that is a bit more unusual.  This circuit allows you to insert 1-8 wait state "holes" anywhere in the S-100's address space to accommodate a pocket of slow access RAM.  For example; I have a Lomas IBM compatible CGA S-100 video board who's RAM can be configured to add 2 wait states when it is addressed.   However if I run the 8086 board at 9MHz under MSDOS, the video RAM yields errors.   Using the above circuit, I can add 4 wait states to the S-100 bus only when the 8086 accesses RAM at B8000H-BFFFFH.  No video errors are detected.

Here is a picture of the prototype board.
MSDOS Prototype Board
  
Please excuse the wire jumper corrections. They will be corrected on the final board.

The Circuits
The circuitry for the board is fairly straightforward. It actually consists of four separate components. 
The PIC/interrupt circuit is perhaps the most complex.

  
PIC Circuit

   
In order to understand this circuit please read my write-up on the 8259A here first.   Note this circuit has to be very reliable. MSDOS requires the 8254 timer system tick to trigger an interrupt 18 times a second!

The CMOS RTC circuit is shown here:-
    
RTC Circuit
 
The timer data in and out lines share the same bi-directional 8 bit board data bus with the 8259A. Because they are addressed via different port numbers there is never a conflict.


The 8254 Timer circuit is shown here:-
  
Timer Circuit

Again the timer data in and out lines share the same bi-directional 8 bit board data bus with the 8259A and CMOS RTC chips. Because they are addressed via different port numbers there is never a conflict.

Software
Unfortunately I have to backtrack and update the clock driver on all my operating system disks to accommodate this new chip.  I have already done it for the Z80 Monitor which can be seen here (bottom of page).  The corresponding 8086 Monitor code can be seen here (bottom of page). 

A CPM3 BIOS Clock driver utilizing the DS12887 (or the older MM58167A chip) can be obtained here (bottom of page). 


Here is a small MSDOS diagnostic program to read and set the time and date for the DS12887 CMOS RTC chip.
CMOS-RTC Tests.pdf
CMOS-RTC.ZIP

Here is a small CPM3 diagnostic program to read and set the time and date for the DS12887 CMOS RTC chip.
Z-RTC.pdf
Z80 RTC Diagnostic.zip

The Final Production Board
The final production board is shown here. 

Final MSDOS Board
Some of the  minor corrections of the above prototype were corrected for this "production board":-

LED's to show when wait states are inserted on the S-100 bus during access of the onboard EEPROMS
Jumpers to inactivate the onboard the wait state generator and the onboard EEPROM access.
A minor optimization of some of the circuitry.


Step By Step Building The Board.
The first step is to examine the board carefully for scratches or damaged traces. Use a magnifying glass if need be. The quality of the boards we get is excellent. I must have done over 30 by now, never had a problem, but there is always a first time. A broken trace is almost impossible to detect by eye on a completed board.

Next solder in all the required IC sockets, resistors, resistor arrays, capacitors, jumpers, the 14.318MH crystal, dip switches and the voltage regulators.  Do not add the LED's or LED bar yet. Be sure you put the resistor arrays in with the correct orientation of pin 1. Check their values before  soldering (they are difficult to remove).  You may want to consider/check using a 330 Ohm array for RR6 instead of 220 Ohms depending on how bright you wish the LED bar to be.  Also you have to be careful not to overload the pull-up resistors on the S-100 interrupt lines.  Any one line should have no more that 1K Ohm pulling up the lines open collector output. This pull-up is typically supplied by the bus master CPU board.  If so, there is no need to add RR9.  You will notice in the above picture I added a single row socket (bottom LHS of board) so RR9 can be added if required.

For prototype boards I generally use "double swipe" IC sockets. For a critical board like this I prefer to use "Machine Tooled" IC sockets.  However they are more expensive and you have to be particularly careful not to bend the IC pins.  If you think you will be doing a lot of EEPROM burning you should use the Low Profile ZIF sockets (e.g. Jameco #102745) for the two EEPROM sockets.  The clock oscillator should have its  own special sockets (e.g. Jameco #133006).

Check the voltage to sockets on the board is about ~5V by placing the board in your S-100 system using an extender board. With no load you will typically get between ~4.9V to 5.1V.  BTW, your system should boot and run correctly with its Z80 CPU and this bare board in an extender slot. If not, you have a serious solder bridge somewhere on the board.  Before you do anything else with a magnifying glass go over every socket on the board and examine for a proper solder joint. I like to "reheat" each joint just to be on the safe side. The silk screen/varnish on these boards us quite thick. It's easy not to have a good solder joint for the ground pins.  Double check.   Extra time here will save you hours later!  I don't know how many times I could have sworn I soldered each pin correctly on a board only to later find I missed one.

We will now build the board up in functional steps. Avoid the temptation of adding everything at once and popping it into your S-100 box. Step by step is faster in the end -- trust me.

First we will add the 4 LED's.  Insert LED them into the board (usually the longer lead into the square pad) but do not solder yet.  Insert the board into your S-100 system and with a probe tied to ground for the empty socket pins 4 & 12 of U5, pin 2 of U41 and pin 6 of U3. The LEDs should light up. If not switch the LED leads.  Only then solder in place. 

The color of the LED's is up to you. I always use Red for an INT in my system so LED D2 is red.  Green (D1) for an INTA. Since D3 and D4 are for wait state/EEPROM  indications.  I use the same colors (yellow).   Here is a picture of the board at this stage:- 
   
  LED's Check

We will now add the circuitry to the board.

First we will add the Interrupt circuit that acknowledges interrupt(s) from the 8259A PIC on the S-100. This controller uses only I/O ports 20H & 21H.  The 8259A on this board is constructed to work closely with the EPROM 8086 monitor program described here.  We will use that program to test the board/chip.  This assumes the keyboard pulses S-100 interrupt Vector 1 (pin#5).

Insert IC's U2, U4, U3, U41, U34, U8 U35, U50, U52, U54, U48, U49 and U52. Place a logic probe on pin 1 of U6.  With your Z80 monitor input ports 20H or 21H. pin 1 of U6 must pulse low. Inputting from any other port will not do so. The input value is usually 0FFH. (The input pins of U6 normally float high). Grounding say, pin 2 of U6 should yield a value of 0FEH. 

Next we will add the 8259A PIC itself, U7. Also add U13, U5, and U8.  Bend out pins 1 & 10 of U37  (a 74LS01) and inset. Install J4 at bottom middle of board.  Insert in your S-100 system and jump to the 8086 Monitor.  Use the "X" command to go to the MS-DOS menu and start the 8259A keyboard test command ("E") command.  Whenever you type a keyboard character the 8259A will detect the interrupt on the S-100 VI-1 line (pin #5).  Both LEDs D1 & D2 should flash.  If you don't have the Propeller Console IO board configured to pulse the interrupt line you can simply temporally (but carefully) ground the S-100 bus pin #5.

If you have not yet used/written the above 8086 monitor program you can run a simple test of the 8259A chip by writing a value to its status port (21H). Whatever value you write you must get back with a subsequent read of port 21H.  If not something is wrong.

Next add the LED bar and the four remaining 74LS123's, U24-U27.  Do not solder in the LED bar until you see it works and is in the correct orientation. repeat the above keyboard test. Only the second from right  LED bar should pulse as well as LED 1 & 2. Here is a picture of the board at this stage:-
  
PIC Check
    
  
Next we will add the Dallas RTC chip section.  Insert U11, U42, U49, U55 and U31.  Check when you output to port 71H that pin 14 of U19 pulses low.  Check when you input from port 71H that pin 17 of U19 pulses low.   Then insert the Dallas RTC chip in U19.   Be careful of its pins they are somewhat fragile.  Next boot CPM (Z80) and run the program Z-RTC (see above).   Here is how the menu appears:-
  
  RTC Menu
  
  
Set the time and date and read them back.  You can view the RAM storage are on the chip using the #8 menu option.  Power down the computer and then restart it. The correct time should be mentioned.  Here is a picture of the board at this stage:-
 
 
 
 
Next we will add the 8254 Timer circuit.  If all of the above works then you should have no trouble with the timer circuit. Add U46, U60, U61, U56, U62, U47 and the 8254 U53.  We will use the IBM-PC format of using Interrupt vector 0 for the system tick, so jumper pins 1-2 on P54.

To test input ports 40H-43H. In all cases U35 pin 11 should pulse low. Then output to ports 44H-47H.  In all case U60 pin 11 should pulse low. 
Input Port 40H.  Every time it will be a different value. If its stuck at 0FFH something is wrong.  Ports 41H-43H will be 0FFH.
If you have a frequency counter it does no harm to make sure the frequency going into pin 9, 15 & 18 of U53 is ~1.93MHz.  Mine was 1.96MHz see picture.
When you load MS-DOS (see here) and type "TIME" on the command line repeatedly, the time should increase over time. If not the above timer circuit is not working correctly
 
  Timer Clock Check


Next we will install the circuit to house the onboard EPROMS. We will use two 28C256 EEPROMS. See here for other EPROM options.

Add all the remaining IC's to the board.  Remove U37 and bend back in pins 1 & 10.  Jumper K6 1-2, K7 1-2, K1 1-2.  For 28C256 EEPROMs jumper K2 1-2, K3 2-3, K4 2-3. Next the EPROM 74LS682's need to be configured.  If possible it's best to use EPROMS on your 8086 CPU board while you are checking out the EPROMS on this board.  This way the 8086 Monitor "A" command will show you where your EPROMs reside.  Let's place the EPROMS at:-

00E80000H - 00EFFFFH initially.

Jumper (via a wire wrap) all pins on P45 to the corresponding pins on P49. Jumper P50 pin 1 to P46 pin 1, P50 pin 8 to P46 pin 8. All the remaining pins of P50 go to the corresponding pins on P48 (ground).  Set the switches SW9 and SW10 as shown here:-
  
  ROM Jumpers

Configuring these EEPROM start addresses and ranges is a bit tricky. You really need to understand how the 74LS682/switch selection system works. See here for more details. 

Study the above picture and the schematic carefully.   Remember also currently, for my (particular) 8086 monitor I do not need the full 256K X2 capacity of the two EEPROMS.  I am using only the "top half" of each EEPROM. That is why the code starts at 00E80000H.  The source code for the 8086 monitor (see here) explains how to burn the top half of such an 27C256 EEPROM.   If you use all of each 28C256 PROMS the code would start at 00E0000H.  Finally as we will see below,  to place the EEPROM at 00F80000H  the right most switch of "U-EPROM" is opened.  At this position the 8086 would find valid reset code at 00FFFF0H.

The actual number of wait states you need to place on the bus for EEPROM access varies depending on the speed of your 8086 CPU (and the bus characteristics itself).  For a 9MHz 8086 bus I like to have 4 wait states with this board (probably overkill).  The ROM access wait states are set via switch SW8 ("ROM-WAIT").  The switches are set right to left. For two wait states close switches 5-8.

With the EPROMS set up as described above you should see them in the Memory map as shown here:-
 
  EPROM Mem Maps

You should be able to move the data to another location and verify it is correct using:-

ME8000,EFFFF,12345
VE8000,EFFFF,12345


If you wish to use the EPROMS to boot an 8086 monitor you need to reset the EEROM locations (see below).

Finally there is the second wait state circuit that as I described above to put a wait state "hole" somewhere else within the S-100 16MG or RAM.  I use it for the Lomas Video board with its video RAM at B8000H-BFFFFH. 

Here is a picture of the boards final configuration of jumpers and switches for the typical situation where the EEPROMS containing the 8086 Monitor program reside at F8000H-FFFFFH. The 8086 will reset from location FFFF0H.  If you are using our 8086 board remember to set its K3 jumper 2-3 to inactivate its onboard EPROMs.
 
  Final Jumpers
   
Finally in order to increase the reliability of the board at high speeds it is desirable to keep port I/O and Interrupt Acknowledge access time to a minimum.
I use, and recommend, that you use 74Fxx chips for U41, U3, U34, U6, U35  and a 7401 for U37.  (Do not use a 74F244 for U8 it will load the bus unnecessarily).
For the upcoming 80386 CPU board with MSDOS, its essential that U6 be a 74F244 otherwise you will get false ints.

A Description of the Board Jumpers.
The  board contains a number of important jumpers that determine how it functions. Most will not need to be changed once the system is running but it is very important they are configured correctly.  In no particular order:-
  
 
Jumper    Function 
K7 This jumper in the 1-2 position activates the EPROM circuit. 2-3, the circuit is inactive
K6 This jumper in the 2-3 position activates the general RAM wait state circuit. 1-2, the circuit is inactive
K1 This jumper in the 1-2 position activates the S-100 bus phantom line. (Normally required with K7 1-2). If ROM is not used, leave un-jumpered. Position 2-3 is not of general use.
K2, K3, K4 Various uses depending on the type or EPROM or EEPROM used. For 28C256's use K2, K3 2-3, K4 1-2
P52 Short this jumper to reset the Dallas RTC to its factory reset state. Normally unconnected
P53, P38 These jumpers are available if needed to have the RTC chip trigger an interrupt line
K5 These jumpers are used to connect the 3 internal counters together of the 8254 if desired
P54 These jumpers are available if needed to have the 8254 chip trigger an interrupt line
JP1,JP2, JP3 These are jumpers that allow you to utilize extra board ground lines as defined in the IEEE-696 specs.  Nor required, do not use with older S-100 systems

  

A Prototype V2 Version of the MSDOS Support S-100 Board.
The above board has proven to be popular and reliable.  Over 20  boards were already made and distributed to users.  I decided to add a few small changes to the board to improve it's functionality. We are calling this board the V2-MSDOS Support Board.

The changes/additions are:-
   
  1. Add a HolTek HT6542 PC keyboard controller chip to allow a MSDOS keyboard and mouse connection
  2. Replace the RTC with a chip that utilizes a separate battery for future replacements/availability
  3. Optimize the board layout and traces so the overall lengths are shorter and more reliable
  4. Remove the S100 bus extra wait state circuit
  5. Label the jumper options on the board better
          
Here is a picture of the assembled V2 MSDOS Support board:-
    
  V2-Board
    
This new board retains most of the chips and components of the original MSDOS support board. One can simply swap chips and utilized the new features of this board.  However be aware that some of the jumpers (and switch positions)  have changed.  I normally run the board with our 8086 or 80286 CPU boards at 12 MHz. At this speed the board is absolutely rock solid.

The main reason for building this V2 version was to add the ability to utilize a standard IBM PC keyboard and mouse interface to S-100 bus systems.  While this could be done with discrete logic/74LSxx chips and an 8042 CPU, the availability of established "keyboard controllers"  really simplifies things.  These chips contain everything you need to interface to a PC keyboard and mouse in one chip.   I chose to work with the HolTek HT6542B chip. The datasheet can be seen here.  BTW, I did try the pin compatible VIA VT82C42 chip as well.  I could not get the software to work with it however. Probably something trivial. It's datasheet can be seen here.

The original board described above was quite crowded, to fit the keyboard controller something had to go.  I decided not to add the circuit that allowed one to insert wait states on the bus for memory locations not utilized by this board.  The circuit was seldom used since most other slow S100 boards already have their own wait state circuit.

As you can see below the board is still crowded but it contains most of the auxiliary functionality you might see in MSDOS PC systems.
  
  V2-Board-2
 
 
The description at the start off this page still describes the main components of the board.  The V2 schematic is provided below.
The new feature the Keyboard controller circuit is shown here:-
  
  Key Circuit
    
As you can see everything is in one chip and a safety net 74LS06 driver.

Programming the HT6542B
Writing a keyboard driver, while not rocket science, is not a trivial task. There are just a large number of "special cases" you have to take into account when translating the keyboard scan codes into ASCII.   I have already done with our PC keyboard Converter board using a Z80, see here.  For the 8086 family of CPU's you can utilize the IBM PC BIOS code directly. This MSDOS support board utilizes the exact same I/O ports (60H & 64H).  If you are going to write your own software, first understand in detail the PC/keyboard protocol.  You can get started with the link here.

To help you debug the circuit however I have written the following short Z80 program called KEY-DEMO.Z80.
This initializes the HT6542 chip and displays the byte sequence sent to the computer with each keystroke.
If somebody can later provide efficient Z80 and 8086 keyboard translation routines I will provide them here for all to use.


Step By Step Building The V2 Board.
The first step is to examine the board carefully for scratches or damaged traces. Use a magnifying glass if need be. The quality of the boards we get is excellent. I must have done over 50 by now, never had a problem, but there is always a first time. A broken trace is almost impossible to detect by eye on a completed board.  I find it useful to carefully slide a file at 45 degrees along the edges (front & back) of the S100 connectors for easier insertion into the bus. Carefully, just one or two strokes.

Next solder in all the required IC sockets, resistors, resistor arrays, capacitors, jumpers, the 14.318MHz & 32.767 KHz crystals, dip switches and the voltage regulator.  Do not add the LED's or LED bar yet. Be sure you put the resistor arrays in with the correct orientation of pin 1. Check their values before  soldering (they are difficult to remove).  You may want to consider/check using a 330 Ohm array for RR6 instead of 220 Ohms depending on how bright you wish the LED bar to be.  Also you have to be careful not to overload the pull-up resistors on the S-100 interrupt lines.  Any one line should have no more that 1K Ohm pulling up the lines open collector output. This pull-up is typically supplied by the bus master CPU board.  If so, there is no need to add RR9.  You will notice in the above picture I added a single row socket (bottom LHS of board) so RR9 can be added if required.  For the voltage regulator it should be rated to at least 1.5 Amps. I like to use the 3 Amp versions (e.g. Mouser P/N 511-LM323T).  There is a trace on the front of the board that runs near/under the heat sink.   To be on the safe side you should put a mica washer between the heat sink and the board so there is no danger of the board varnish melting and causing a short.
 

For prototype boards I generally use "double swipe" IC sockets. For a critical board like this I prefer to use "Machine Tooled" IC sockets.  However they are more expensive and you have to be particularly careful not to bend the IC pins.  If you think you will be doing a lot of EEPROM burning you should use the Low Profile ZIF sockets (e.g. Jameco #102745) for the two EEPROM sockets.  The clock oscillator should have its  own special sockets (e.g. Jameco #133006).

Check the voltage to sockets on the board is about ~5V by placing the board in your S-100 system using an extender board. With no load you will typically get between ~4.9V to 5.1V.  BTW, your system should boot and run correctly with its Z80 CPU and this bare board in an extender slot. If not, you have a serious solder bridge somewhere on the board.  Before you do anything else with a magnifying glass go over every socket on the board and examine for a proper solder joint. I like to "reheat" each joint just to be on the safe side. The silk screen/varnish on these boards us quite thick. It's easy not to have a good solder joint for the ground pins.  Double check.   Extra time here will save you hours later!  I don't know how many times I could have sworn I soldered each pin correctly on a board only to later find I missed one.

We will now build the board up in functional steps. Avoid the temptation of adding everything at once and popping it into your S-100 box. Step by step is faster in the end -- trust me.

First we will add the 3 LED's.  Insert the LED leads into the board (usually the longer lead into the square pad) but do not solder yet.  Insert the board into your S-100 system and with a probe tied to ground for the empty socket pins 4 & 12 of U5, and pin 2 of U42. The LEDs should light up. If not switch the LED leads.  Only then solder in place. 

The color of the LED's is up to you. Here I have  Green for an INT in my system, so LED D2 is green.  Red (D1) for an INTA. D4 is for the EEPROM access and is Yellow.   Here is a picture of the board at this stage:- 
   
  V2-Start

We will now add the circuitry to the board.

First we will add the Interrupt circuit that acknowledges interrupt(s) from the 8259A PIC on the S-100. This controller uses only I/O ports 20H & 21H.  The 8259A on this board is constructed to work closely with the EEPROM 8086 monitor program described here.  We will use that program to test the board/chip.  This assumes the keyboard pulses S-100 interrupt Vector 1 (pin#5).

Insert IC's U2, U4, U3, U41, U34, U8 U35, U50, U52, U54, U48, U15, U49 and U52. Place a logic probe on pin 1 of U6.  With your Z80 monitor input ports 20H or 21H. pin 1 of U6 must pulse low. Inputting from any other port will not do so. The input value is usually 0FFH. (The input pins of U6 normally float high). Grounding say, pin 2 of U6 should yield a value of 0FEH. 

Next we will add the 8259A PIC itself, U7. Also add U13, U5, and U6.  Bend out pins 10 of U37  (a 74LS01) and inset. Install J4 at bottom middle of board.  Insert in your S-100 system and jump to the 8086 Monitor on your 8088, 8086 or 80286 board.  Use the "X" command to go to the MS-DOS menu and start the 8259A keyboard test command ("E") command.  Whenever you type a keyboard character the 8259A will detect the interrupt on the S-100 VI-1 line (pin #5).  Both LEDs D1 & D2 should flash.  If you don't have the Propeller Console IO board configured to pulse the interrupt line you can simply temporally (but carefully) ground the S-100 bus pin #5.  Or if you have our SMB, you can jumper the 555 timer to one of the S100 bus interrupt lines (Jumper P40).  In all cases the appropriate LED bar should flash.  Here is a picture of the monitor test output:-
 
  V2-Intest1 
   
If you have not yet used/written the above 8086 monitor program you can run a simple test of the 8259A chip by writing a value to its status port (21H). Whatever value you write you must get back with a subsequent read of port 21H.  If not something is wrong.

Next add the LED bar and the four remaining 74LS123's, U24-U27.  Do not solder in the LED bar until you see it works and is in the correct orientation. Repeat the above keyboard test. Only the second from right  LED bar should pulse as well as LED 1 & 2. Here is a picture of the board at this stage:-
  
V2-With 8259A1
    

Next we will add the Dallas DS12885 RTC chip section.  Insert U11, U42, U49, U55 and U31.  Check when you output to port 71H that pin 14 of U19 pulses low.  Check when you input from port 71H that pin 17 of U19 pulses low.   Then insert the Dallas RTC chip in U19.   Next, boot CPM (Z80) and run the program Z-RTC (see above).   Here is how the menu appears:-
  
  RTC Menu
      
Set the time and date and read them back.  You can view the RAM storage are on the chip using the #8 menu option.  Power down the computer and then restart it. The correct time should be mentioned.  Here is a picture of the board at this stage:-
  
V2-With RTC1
  
Next we will add the 8254 Timer circuit.  If all of the above works then you should have no trouble with the timer circuit. Add U46, U60, U61, U56, U62, U47 and the 8254 U53.  We will use the IBM-PC format of using Interrupt vector 0 for the system tick, so jumper pins 1-2 on P54.

To test input ports 40H-43H. In all cases U35 pin 11 should pulse low. Then output to ports 44H-47H.  In all case U60 pin 11 should pulse low. 
Input Port 40H.  Every time it will be a different value. If its stuck at 0FFH something is wrong.  Ports 41H-43H will be 0FFH.
If you have a frequency counter it does no harm to make sure the frequency going into pin 9, 15 & 18 of U53 is ~1.93MHz.  Mine was 1.96MHz see picture.
If you already have MS-DOS running on your system (see
here), and type "TIME" on the command line and enter just a CR repeatedly.  The time should increase over time. If not, the above timer circuit is not working correctly.  Here is a picture of the board at this stage:-
      
V2 With Timer
    

Next we will install the circuit to house the onboard EPROMS. We will use two 28C256 EEPROMS. See here for other EPROM options.
Please note there is a labeling error on the board.
The label under SW6 should say "U-EPROM" and the label under SW10 should say "L-EPROM."

Add the IC's U43, U44, U45, U32, U58, U9, U39, U28 & U29. Remove U37 and bend back in pin 10 and reinsert. 
Jumper K7 1-2.  For 28C256 EEPROMs jumper K2, K3 2-3, K4 1-2 & JP5.

Next the EPROM 74LS682's need to be configured.  If possible it's best to use EPROMS on your 8086 CPU board while you are checking out the EPROMS on this board.  This way the 8086 Monitor "A" command will show you where your EPROMS reside.  Let's place the EPROMS at:-

00E00000H - 00EFFFFH initially.

Jumper all pins on P39 to the corresponding pins on P43. Jumper all pins on P46 to the corresponding pins on P50 except P46 pin8 is jumpered to p48 pin 8.
Set the switches SW9 and SW10 as shown here:-
    
  V2-EPROM Jumpers
    
Configuring these EEPROM start addresses and ranges is a bit tricky. You really need to understand how the 74LS682/switch selection system works.
See here for more details. 

Study the above picture and the schematic carefully.   Remember currently, for my (particular) 8086 monitor, I do not need the full 256K X2 capacity of the two EEPROMS.  I am actually using only the "top half" of each EEPROM. That is why the code starts at 00E80000H.  The source code for the 8086 monitor (see here) explains how to burn the top half of such an 27C256 EEPROM.   If you use all of each 28C256 PROMS the code would start at 00E0000H. 

The actual number of wait states you need to place on the bus for EEPROM access varies depending on the speed of your 8086 CPU (and the bus characteristics itself).  For a 9MHz 8086 bus I now use 1 wait state with this board.  The ROM access wait states are set via switch SW8 ("EPROM-WAIT").  The switches are set right to left. For two wait states close switches 5-8.

With the EPROMS set up as described above you should see them in the Memory map as shown here:-
      
  V2-With EPROM Map
    
You should be able to move the data to another location and verify it is correct using:-

ME0000,EFFFF,12345
VE0000,EFFFF,12345


If you wish to use the EPROMS to boot an 8086 monitor you need to reset the EEROM locations (see below).

Here is a picture of the boards final configuration of jumpers and switches for the typical situation where the EEPROMS containing the 8086 Monitor program reside at F0000H-FFFFFH. The 8086 will reset from location FFFF0H.  If you are using our 8086 board remember to set its K3 jumper 2-3 to inactivate its onboard EPROMs and force it to utilize an external S100 bus ROM (e.g. those on this board).
    
  V2-With EPROMS Final Jumpers1
     
Here is a picture of the board at this stage:-
   
  V2-With EPROMS
             
Finally we will install the keyboard and mouse input controller chip, the Holtek HT6542B.  I actually don't use this keyboard input for my system and MSDOS.  I use the keyboard input of the Propeller driven Console-IO board.  However this chip has the advantage that it is completely IBM-PC compatible (and has a mouse input port). For later Linux systems it will be useful.

For the build, you simply fill in all the remaining IC chips (U33, U12 and U100).  Also add the 8 MHz oscillator to p3.  Jumper K6 1-2. For a PS2 keyboard, jumper  K10 2-3. For the older non-PS2 keyboards, jumper K10 1-2.  The top left hand side (K9) keyboard connector has the following pinout (as viewed from the front of the board) :-
    
Keyboard Connector
  
Here is a picture of the final board at this stage:-
  
  V2-keyboadr controller
    
To help you debug the circuit however I have written the following short Z80 program called KEY-DEMO.Z80.
This initializes the HT6542 chip and displays the byte sequence sent to the computer with each keystroke.  Note for testing, you will need two keyboards if your normal PC keyboard is the Propeller driven Console-IO board.  Here is a picture of the KEY-DEMO output:-
    
  V2-Keyboard test
    
For this board I'm hoping somebody out there will take the time to write efficient Z80 and 8086 keyboard translation routines to use this chip. In particular it would be nice to have them as an option in the 8086 ROM based monitor code. So that depending on an equate, the keyboard input could be from either this board or the Propeller driven Console-IO board. 

Finally please note; In order to increase the reliability of the board at high speeds it is desirable to keep port I/O and Interrupt Acknowledge access times to a minimum. I use, and recommend, that you use 74Fxx chips for U41, U3, U34, U6, U35  and a 7401 for U37.  (Do not use a 74F244 for U8 it will load the bus unnecessarily).  For the upcoming 80386 CPU board with MSDOS, its essential that U6 be a 74F244 otherwise you will get false ints.  Also be careful not to overload the S100 bus's 9 interrupt lines with pull-ups. There should be only one 1K pull-up resistor somewhere on the S100 bus for each line.  They is why we use a socket for RR9.   Neil Breeden has kindly drawn up a components picture/list for this board. It can be downloaded from here. Thanks Neil.


Bugs:-
I noticed that a prototype version (GAL based version) of the 80386 board running at high speed (10MHz S100 bus clock, 2 wait states) was triggered by random false interrupts. Replacing U6 (a 74LS244 on this board) with a 74F244 eliminated the problem.  This substitution should be done for all CPU's.



A V3 Version of the MSDOS Support S-100 Board.
The above two boards (V1 & V2)  have proven to be very popular and reliable.  Over 50  boards were already made and distributed to users.  Along with the help of David Fry in the UK, we decided to do what we hope will be the final addition of this board.  As has been done for our IDE/CF Card board, SMB Board and 16MB Static RAM board, we have utilized two 22V10 GAL's on the board to speed up the circuitry. This yielded some more board real estate on which we could squeeze in a few more functions.  We are calling this board the V3-MSDOS Support Board.

The changes/additions are:-

  1. Added two 22V10 GALs for board port decoding.
  2. Add an AT compatible 16550 UART and RS232 driver and port connection
  3. Optimize the 8258A Interrupt controller circuit and add a wait state generator (0-8 wait states for INTAs)
  4. Correct errors on the AT compatible Timer sound/speaker output. (Ports, jumpers)
  5 Added PC style PS/2 mini-DIN connectors for the keyboard and mouse connectors.
  6. Add three options for the 5V regulator. A TO-3 LM323K, an EzSBC PSU5 or a Pololu 3A switching regulator.
  7. Hand lay down the Vcc line for efficient power distribution on the board.
  8. Corrected silk screen labeling of Upper/lower EPROM switches (SW6 & SW10)
  8. Silk screen labeled all IC's for easier assembly/debugging.
  
Here is a picture of the assembled V3 MSDOS Support board:-
      
  V3 MSDOS Support Board

 To understand how the two GALs have been spliced into this V3 board you should open up the schematic of the V2 MSDOS board

The first GAL U2, provides decoding for all of the I/O ports used by the various sections of this V3 MSDOS Support board.  The GAL programming code is provided below but here is the relevant Equations Section:-

/TIMER   = /UP6_BITS * /bA9 * /bA8 * /bA7 * bA6 * /bA5 * /bA4 * /bA3 * /bA2 * /IO_REQUEST
/8042_CS = /UP6_BITS * /bA9 * /bA8 * /bA7 * bA6 *  bA5 * /bA4 * /bA3 * /bA1 * /bA0 * /IO_REQUEST * /8042_EN
/8259_CS = /UP6_BITS * /bA9 * /bA8 * /bA7 * /bA6 * bA5 * /bA4 * /bA3 * /bA2 * /bA1 * /IO_REQUEST
/SPEAKER = /UP6_BITS * /bA9 * /bA8 * /bA7 * bA6 *  bA5 * /bA4 * /bA3 * /bA2 * /bA1 * bA0 * /IO_REQUEST
/RTC_70H = /UP6_BITS * /bA9 * /bA8 * /bA7 * bA6 *  bA5 * bA4 * /bA3 * /bA2 * /bA1 * /bA0 * /IO_REQUEST
/RTC_71H = /UP6_BITS * /bA9 * /bA8 * /bA7 * bA6 *  bA5 * bA4 * /bA3 * /bA2 * /bA1 *  bA0 * /IO_REQUEST
/UART_CS = /UP6_BITS *  bA9 *  bA8 *  bA7 * bA6 *  bA5 * bA4 *  bA3 * /bA2 * /bA1 * /bA0 * /IO_REQUEST

There are not enough input pins on this GAL for all the 16 I/O port address lines.  We set the upper 6 address lines with the 74LS682 comparator U4.

Here is the relevant circuit:-

  MSDOS Port Decoding

 Some of the output pins of this GAL feed directly into the second GAL (U11) to directly address the Timer ( U53) and RTC (U19) chips.
 

  U11 GAL2

I/O port addressing for the Timer D8254 registers (U53) and the D-Type flip flops that control the Timer 2 gate for speaker sound are now generated by the GAL ffixed I/O port decoder. The speaker port address has also been updated to port 61H as per PC XT/AT spec.

 

I/O Ports 40H to 43H & Port 61H:-

 

/TIMER   =   /UP6_BITS * /bA9 * /bA8 * /bA7 * bA6 * /bA5 * /bA4 * /bA3 * /bA2 * /IO_REQUEST

/SPEAKER =   /UP6_BITS * /bA9 * /bA8 * /bA7 * bA6 *  bA5

          *  /bA4 * /bA3 * /bA2 * /bA1 * bA0 * /IO_REQUEST

 

The TIMER_RD* signal is also generated in this second GAL (U11) by taking the signal TIMER* from GAL U2 and applying the following equation, this replaces  U35D in the V2 schematic.  

TIMER_RD = TIMER + /bpDBIN

There has been no change to the 8042 style Keyboard/Mouse controller from the V2 schematic, except that the 8042_CS* chip select signal is now generated by the fixed address port decoder of GAL U2. The equation element  /8042_EN  below is a status input set by an external jumper to permit enable/disable the controller.  

/8042_CS = /UP6_BITS * /bA9 * /bA8 * /bA7 * bA6 * bA5 * /bA4 * /bA3 * /bA1 * /bA0 * /IO_REQUEST * /8042_EN

In the RTC section (U19) of the V2 schematic four ‘OR’ gates and one magnitude comparator have been removed and replaced by two equations in GAL U2:-

/RTC_70H = /UP6_BITS * /bA9 * /bA8 * /bA7 * bA6 * bA5 * bA4 * /bA3 * /bA2 * /bA1 * /bA0 * /IO_REQUEST

/RTC_71H = /UP6_BITS * /bA9 * /bA8 * /bA7 * bA6 * bA5 * bA4 * /bA3 * /bA2 * /bA1 * bA0 * /IO_REQUEST  

and one equation in the glue logic GAL, GAL U11  

RTC_RD = RTC_71H + /bpDBIN  

With the extra new board space available a new section has been added to incorporate a PC style 16660 UART. Address bits bA9 and bA8 had to be brought into GAL U2 to enable port decoding of 3F8H --  the normal COM1 PC Serial port. Aalternative port addresses would just require changes to the /UART_CS  equation.


/UART_CS
= /UP6_BITS * bA9 * bA8 * bA7 * bA6 * bA5 * bA4 * bA3 * /IO_REQUEST

Here is the relevant circuit:-
      
    
  Uart Circuit

  

U16 and the connector P6 allow for a standard RS232 hookup. Please refer to our Serial I/O board for more help in this area if needed.

Receiving a little more modification from the V2 board, the 8259A interrupt controller circuit inverter U37D has been changed to a 74LS06 in a drive to reduce chip count. The D8259 chip select signal 8259_CS* is now generated inside GAL U2 with the equation:-  

/8259_CS = /UP6_BITS * /bA9 * /bA8 * /bA7 * /bA6 * bA5 * /bA4 * /bA3 * /bA2 * /bA1 * /IO_REQUEST  

The data bus control gate U34C has been changed from a 3 input AND gate to a 2 input NOR gate, this is possible by inverting the polarity of the input signals to be active high instead of active low.  So now the bus driver U6 output enable is driven by U42A (NOR), the sINTA* signal is inverted by U41B so that when active it presents a (required) logic high to pin 3 of U42A. Pin 2 of U42A is driven by signal DBUS_IN, this signal is generated inside of glue logic GAL U2 and replaces the old 4 input AND gate arrangement which only supported 4 signals.

The new fifth signal is for the new D16550 UART.  

/DBUS_IN = TIMER_RD * RTC_RD * 8042_CS * 8259_CS * UART_CS                    
         + /bpDBIN


Finally, a wait state generator has been added to the V3 PC-AT board, it takes its trigger input from the glue logic GAL U11 signal IO_WAIT, the equation is currently shown below but could be modified to if it is found that other circuit functions need wait states to cope with the new CPU boards. 
All the various chip select lines have been intentionally directed into GAL U11 to facilitate this option.   Currently we use this option only for the 8259A.  This chip seems to be the weakest link on the board when running the high speed 80386 and 80486 CPU boards at 10MHz and above.

/IO_WAIT = /8259_CS

The remaining 5 equations of GAL2 deal with 8 bit/16 bit data bus steering  for the onboard pair of EPROMS.
Remember the SIXTN* signal has to go through a buffer like a 74LS07, as this signal drives the S100 bus as a bus wide O/C (active low) signal.

All the above logic elements were taken inside the glue logic GAL U2 and expressed in the following equations:-
  
/SIXTN = /bsXTRQ * ROM_SEL
/A = bpDBIN *  bsXTRQ * ROM_SEL * /bA0 + bpDBIN * /bsXTRQ * ROM_SEL
/B = bpDBIN *  bsXTRQ * ROM_SEL * /bA0
/C = bpDBIN * /bsXTRQ * ROM_SEL
/D = bpDBIN * /bsXTRQ * ROM_SEL + bpDBIN * bsXTRQ * ROM_SEL * bA0


Note a spare gate (U28A ) has been used to provide an active high reset pulse for the D16550 UART.
EPROM configuration jumper block K3 has been changed from a 4 way block to a 5 way block P6 permitting easier jumper settings for any of the 3 signal options fro different PROMS (for example  27C256 OTP Proms).

Step By Step Building The V3 Board
As always the  first step is to examine the board carefully for scratches or damaged traces. Use a magnifying glass if need be.  A broken trace is almost impossible to detect by eye on a completed board.  I find it useful to carefully slide a file at 45 degrees along the edges (front & back) of the S100 connectors for easier insertion into the bus. Carefully, just one or two strokes.

Next solder in all the required IC sockets, resistors, resistor arrays, capacitors, jumpers, the 14.318MHz, 8MHz, 1.8432MHz & 32.767 KHz crystals, and dip switches.  Do not add the LED's or LED bar yet. Be sure you put the resistor arrays in with the correct orientation of pin 1. Check their values before  soldering (they are difficult to remove).  You may want to consider/check using a 6 pin arrays for RR3, RR4 and RR8.  The 5 pin ones are not that common.  Just clip off one pin.  be careful with the orientation of the 10 uF Caps. The + pin (square pad), differs from cap to cap left/right.

330 Ohm array for RR6 instead of 220 Ohms depending on how bright you wish the LED bar to be.  Also you have to be careful not to overload the pull-up resistors on the S-100 interrupt lines.  Any one line should have no more that 1K Ohm pulling up the lines open collector output. This pull-up is typically supplied by the bus master CPU board.  If so, there is no need to add RR9.  You will notice in the above picture I added a single row socket (bottom LHS of board) so RR9 can be added if required.  For the voltage regulator it should be rated to at least 1.5 Amps. I like to use the 3 Amp versions (e.g. Mouser P/N 511-LM323T).  There is a trace on the front of the board that runs near/under the heat sink.   To be on the safe side you should put a mica washer between the heat sink and the board so there is no danger of the board varnish melting and causing a short.
 

For prototype boards I generally use "double swipe" IC sockets. For a critical board like this I prefer to use "Machine Tooled" IC sockets.  However they are more expensive and you have to be particularly careful not to bend the IC pins.  If you think you will be doing a lot of EEPROM burning you should use the Low Profile ZIF sockets (e.g. Jameco #102745) for the two EEPROM sockets.  The clock oscillator should have its  own special sockets (e.g. Jameco #133006).

Check the voltage to sockets on the board is about ~5V by placing the board in your S-100 system using an extender board. With no load you will typically get between ~4.9V to 5.1V.  BTW, your system should boot and run correctly with its Z80 CPU and this bare board in an extender slot. If not, you have a serious solder bridge somewhere on the board.  Before you do anything else with a magnifying glass go over every socket on the board and examine for a proper solder joint. I like to "reheat" each joint just to be on the safe side. The silk screen/varnish on these boards us quite thick. It's easy not to have a good solder joint for the ground pins.  Double check.   Extra time here will save you hours later!  I don't know how many times I could have sworn I soldered each pin correctly on a board only to later find I missed one.

We will now build the board up in functional steps. Avoid the temptation of adding everything at once and popping it into your S-100 box. Step by step is faster in the end -- trust me.

First we will add the 3 LED's.  Insert the LED leads into the board (usually the longer lead into the square pad) but do not solder yet.  Insert the board into your S-100 system and with a probe tied to ground for the empty socket pins 4 & 12 of U5, and pin 2 of U42. The LEDs should light up. If not switch the LED leads.  Only then solder in place. 

The color of the LED's is up to you. Here I have  Green for an INT in my system, so LED D2 is green.  Red (D1) for an INTA. D4 is for the EEPROM access and is Yellow.   Here is a picture of the board at this stage:- 
       
  V3 Start Assembly
   
If you have not built the V1 or V2 versions of this board read the above descriptions carefully first.  

You will also need to have up and running one of out 8088/8086/80286 class CPU boards with the ROM's on board active. Alternatively an active ROM with the 8086 Monitor on our ROM Board.  If you are starting from ground zero with another 8086 board (Compupro etc.) you will need some kind of monitor in RAM/ROM to checkout the boards components.

First we need to program the two GAL's.  This is necessary because all the boards ports/circuits run through them.  See here for more information on this.

This time we will get the onboard ROM section working first.  It's the easiest to debug!

Insert IC's U50, U52, U54, U48, U32, U55, U58, U35 (preferably a 74F32), U42, U28, U9 -- but first bend out its pin 12.
Then add U29, U41 & U4. Also GALs 11 & U2.
Jumper all pins on the P39 row to all pins on the P43 row.
Jumper all pins on the P48 row to all pins on the P50 row except pins 8-8 the right-most pins. Jumper pin P46,8 to  P50,8.
Jumper K7 1-2, and JP5.
For 28C256 EEPROMS, Jumper K2, P6 2-3.  For other ROM's lookup up their pinouts and jumper appropriately. Also see here
Lets start with 4 ROM wait states, so SW1 off,off,off,off,on,on,on,on (left to right).
We will set the ROMs up at a starting address of F0000H to FFFFFH so
SW6 (the upper address lines), on,on,on,on,off,off,off,off. (left to right).
SW10 (the lower address lines) all on/closed.
To be safe, leave SW1 all open for now.

Insert the board into the bus.  Bring up your 8086. it should come up and the ROM LED (D4) on this board should  light up.
If not track through the circuit pathway. CS* should be pulsing on pin 22 of both ROM sockets. Pin 19 of both LS682 should pulsing low, (and not so when the Z80 is active).

Check pins 1 & 19 of the empty sockets U44 and U45 are pulsing if the D4 LED is active.
If you select an 8086 monitor memory command ("A") pins 1 & 19 of U43 should pulse briefly.
In critical that these pins remain high when the Z80 is active, (i.e. the ROM is not being addressed).

You are now ready to use the board to hold your 8086 Monitor ROM.  Remove/inactivate them on whatever other board you are using and use this board as the source of your 8086 Monitor (e.g. K3 2-3, on our 8086 board).

Insert the two 28C256's. Insert U43, U44 and U45.
Boot up your system. Hopefully your 8086 comes up. 

If you see a series of "33333..." continuously on the screen then your 8086 is not seeing the EPROMs and it is seeing some diagnostic code placed in RAM at FFFF0H by the Z80 monitor (V5.1 or later), assuming you have RAM at that location.  If your 8086 partially displays the signon message chances are you have a circuit/timing problem.   Try the monitor IOBYTE bits 7 & 6 low test.  Go from there.

Here is a picture of the board at this stage:-
    
  V3 ROMS Added
     
Next we will add the Interrupt circuit that acknowledges interrupt(s) from the 8259A PIC on the S-100 first. This controller uses only I/O ports 20H & 21H.  The 8259A on this board is constructed to work closely with the EEPROM our 8086 (or 80386) monitor programs described here.  We will use that program to test the board/chip.  This assumes the keyboard pulses S-100 interrupt Vector #1 (S100 bus pin#5) from our Console I/O board.  If you don't have the Propeller Console IO board configured to pulse the interrupt line,  you can simply temporally (but carefully) ground the S-100 bus pin #5.  Or if you have our SMB, you can jumper the 555 timer to one of the S100 bus interrupt lines (Jumper P40).  In all cases the appropriate LED bar should flash.


Insert U6, U8, U13, U5 and U7 (preferably a NEC D859AC-2).
Jumper JP4.
Boot up your 8086 monitor and use the "L" menu option.
Any character typed at the keyboard should appear on you screen and both the INT (D2) and sINTA (D1) LED's should flash.
Here is a picture of the board at this stage:-
   
  V3 8259A Added
    
Next add wait state generator for the 8259A. Add U15 and bend in pin 12 of U9. 
Use your 8086 monitor command to test 1 to 8 extra wait states with switch SW1.
When done open all switches because most CPU's will not need these wait states. Its only for future CPU's like a 80486 board.
 
Next insert the interrupt LED bar INT pulse stretchers U24, U25, U26 and U27.
Repeat the above test and see the appropriate LED bar flash. (The second one from the right for Int vector # 1).
Note: the 8086/80386 Monitor has menu commands to test this interrupt controller if you have problems.


Next we will add the Dallas DS12885 RTC chip section.  Also add a 3V DL2025 (or equivalent) coin battery. With your Z80 monitor check when you output to port 70H that pin 14 of U19 pulses high.  Check when you input from port 71H that pin 13 of U19 pulses low.   Then insert the Dallas RTC chip in U19.   Next, boot CPM (Z80) and run the program Z-RTC (see above).   Here is how the menu appears:-
  
  RTC Menu
      
Set the time and date and read them back.  You can view the RAM storage are on the chip using the #8 menu option.  Power down the computer and then restart it. The correct time should be mentioned.  Here is a picture of the board at this stage:-
  
  V3 RTC added


Next we will add the 8254 Timer (U53) circuit.  If all of the above works then you should have no trouble with the timer circuit. Add U46, U60, U61, U56, U62, U47 and the 8254 U53.  We will use the IBM-PC format of using Interrupt vector 0 for the system tick, so jumper pins 1-2 on P54 (The left-most pins).

Add U61, U56, U62,  U47 (an 8 pin 75477) and U53. (I use OKI M82C54-2's).

To test input ports 40H-43H. In all cases U53 pin 21 should pulse low. Then output to ports 44H-47H. 
Input Port 40H.  Every time it will be a different value. If its stuck at 0FFH something is wrong.  Ports 41H-43H will be 0FFH.
If you have a frequency counter it does no harm to make sure the frequency going into pin 9, 15 & 18 of U53 is ~1.93MHz.  Mine was 1.96MHz.

If you already have MS-DOS running on your system (see here), and type "TIME" on the command line and enter just a CR repeatedly.  The time should increase over time. If not, the above timer circuit is not working correctly.  Here is a picture of the board at this stage:-
 
  V3 Tiner Added
   
Next we will install the keyboard and mouse input controller chip, the Holtek HT6542B.  As I said above, I actually don't use this keyboard input for my system and MSDOS.  I use the keyboard input of the Propeller driven Console-IO board.  However this chip has the advantage that it is completely IBM-PC compatible (and has a mouse input port). For later Linux systems it will be useful.

Add U12 & U104.
Jumper K10 1-2.
Make sure to Jumper K6 to enable this chip.

For a PS2 keyboard, jumper  K10 2-3. For the older non-PS2 keyboards, jumper K10 1-2. 
The top right hand side (K9) keyboard connector has the following pinout (as viewed from the top of the board) :-
   
V3 Keyboard Connector 
  
Please note this pinout is different than that on the above V2 board. This pinout is the same as we used in our Console I/O Board.

Beside it is a standard mini-DIN PS2 keyboard socket.   BTW, these sockets are hard to find and very delicate.  Take care fitting them on.
On the right of these lie the corresponding mouse PS2 connectors.

Here is a picture of the final board at this stage:-
  
V3 Keyboard Added
  
    
To help you debug the circuit however I have written the following short Z80 program called KEY-DEMO.Z80.
This initializes the HT6542 chip and displays the byte sequence sent to the computer with each keystroke.  Note for testing, you will need two keyboards if your normal PC keyboard is the Propeller driven Console-IO board.  Here is a picture of the KEY-DEMO output:-
  
  V2-Keyboard test

For this board I'm again hoping somebody out there will take the time to write efficient Z80 and 8086 keyboard translation routines to use this chip. In particular it would be nice to have them as an option in the 8086 ROM based monitor code. So that depending on an equate, the keyboard input could be from either this board or the Propeller driven Console-IO board. 

Finally we come to the major new addition to the board the 16500 UART.   Almost every PC had this type of UART.  Some up to 4 chips.  See here for the relevant data sheet.
Two or three years ago we actually did our own S100 bus dedicated Serial I/O board.  You should review that section if you need to get familiar with these chips.  What this board brings to the table is a UART that is completely software and hardware compatible with the chip found in your typical IBM-PC.  Even PC style interrupts can be utilized.

The relevant is quite simple. Add the 16550 PLCC UART chip itself (U3) and the RS232 MAX239 interface chip.  The UART can be regulated with either a 1.8432 or 18.32 MHz Oscillator. I use the latter.  The only difference is in a value sent to one of its internal registers during initialization. See the example code described below.

To test the circuit we will use some simple Z80 code is a "loop back test".   Jumper pins 3 to 5 and 4 to 6 of connector P5.  Unfortunately since the UART in PC format uses 16 bit I/O addresses (3F8 - 3FF) we need to temporarily modify the U2  GAL to recognize an 8 bit port for the Z80.  Use the following code.

/UART_CS
= bA7 * bA6 * bA5 * bA4 * bA3 * /IO_REQUEST

Then load and run the 16550.COM code provided below.
Any character you type on the keyboard should echo on the screen.   Read and study the example to develop your own applications of the chip.

One nice thing with using GAL's like this is you can tailor chip addresses to suite your need.  For example the following code would allow you to use this UART with an 8086 and Z80 CPU:-

/UART_CS = /UP6_BITS * bA9 * bA8 * bA7 * bA6 * bA5 * bA4 * bA3 * /IO_REQUEST
         + bA7 * bA6 * bA5 * bA4 * bA3 * /IO_REQUEST

Here is a picture of the board at this stage:-
     
  Serial testing   Serial Software
   
Finally you need to test the complete board by booting up MSDSOS.  Using your 8086 (or 80386) monitor "P" command the operation system should load completely using our IDE CF card board or ZFDC Floppy disk controller board.  See here for details as to how to bring MSDOS up with this board in your system.

Thanks goes to David Fry (in the UK) for helping out on the V3 Board, thanks Dave.


Bugs

This MSDOS support board supports most MSDOS programs right out of the box.  However it does not contain an 8237A DMA controller found on the IBM PC motherboard. Any software that utilizes that chip will not work correctly in our system.  The only common (at the time) MSDOS program I have tried with the board that had this requirement was the DOS program "WindowDOS", a directory display program.  I have thought of doing yet another MSDOS support board (a V4 version) with a DMA controller chip onboard.  I'm open to opinions, however I may wait until I get a PDP-11 CPU S100 board working because that system makes extensive use of DMA.

A Production S-100 Board Production S-100 Board
Realizing that a number of people might want to utilize a board like this together with a group of people on the  Google Groups S100Computers Forum, "group purchases" are made from time to time.  Join and contact the group if you would like to be involved in this project.  Currently (7/15/2015), I still have a few of the current bare boards available.

 
The V1 board Parts List (done by Kipp Kyeakel) can be obtained here. Currently I do not have a V2 parts list though there is a lot of overlap.
I obtained the HT6542B chips from Radwell. The other chips were from Jameco. Mouser etc.
  
The links below will contain the most recent schematic and software for this board.
Note, it may change over time and some IC part or pin numbers may not correlate exactly with the text in the article above.

MOST CURRENT SOURCE LISTING OF CMOS-RTC Tests.pdf   (For MSDOS)      (V0.1   4/1/2011)
MOST CURRENT SOURCE CODE FOR CMOS-RTC.ZIP    (V0.1   4/1/2011)

MOST CURRENT SOURCE LISTING OF Z-RTC.pdf  
(FOR CPM)     (V0.1   4/1/2011)
MOST CURRENT SOURCE CODE FOR Z80 RTC Diagnostic.zip     
(V0.1   4/1/2011)

MOST CURRENT MSDOS SUPPORT BOARD SCHEMATIC    (V1, 12/14/2011)
MOST CURRENT MSDOS SUPPORT BOARD LAYOUT 
(V1 , 12/14/2011)



MOST CURRENT SOURCE LISTING OF KEY-DEMO.pdf    (V0.1   2/24/2014)
MOST CURRENT SOURCE CODE FOR KEY-DEMO.zip     
(V0.1   2/24/2014)

MOST CURRENT V2-MSDOS SUPPORT BOARD SCHEMATIC    
(V2  FINAL, 3/3/2014)
MOST CURRENT V2-MSDOS SUPPORT BOARD LAYOUT 
(V2  FINAL 3/3/2014)
V2-MSDOS SUPPORT BOARD JUMPERS LAYOUT  (V2  FINAL 12/2/2014)
Most current KiCAD files for the V2 board  (S100 PC-AT V2-002.zip  11/6/2014)
BOM List for V2 Board                                       (V2 Final   11/17/2016,  from Rick Bromagem )

MOST CURRENT V3-MSDOS SUPPORT BOARD SCHEMATIC    (V3  FINAL, 6/4/2015)
MOST CURRENT V3-MSDOS SUPPORT BOARD LAYOUT  (V3  FINAL 6/4/2015)
Most current KiCAD files for the V3  board  (S100 PC-AT V3-002.zip  6/4/2015)
CODE for GALs.zip      (V0.1   6/7/2015)
MOST CURRENT SOURCE CODE FOR 16550.zip      (V0.1   6/4/2015)
BOM List for V3a Board                                       (V3a Final   8/27/2016,  from Rick Bromagem )

Other pages describing my S-100 hardware and software.
Please click here to continue...

 

This page was last modified on 11/17/2016