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RE: [N8VEM-S100:3369] Re: GAL's and PALASM

Take a look at the internal schematic of the 22V10, you'll see the gates near the middle of the page have more inputs than the gates at the top and bottom.  Also, there are 1 or 2 pins that are reserved for specific tasks, sorry, I'm not an expert, but I think those tasks are reset and clock.  Otherwise, it's a very interesting thread, I'm following along and learning too.


Date: Mon, 28 Apr 2014 22:31:08 -0700
From: mon...@vitasoft.org
To: n8vem...@googlegroups.com
Subject: Re: [N8VEM-S100:3369] Re: GAL's and PALASM

But does that mean that all the output pins of a 22V10 (14-23) are not the same?  That's news to me.  I thought it did not matter which one you used.

On Monday, April 28, 2014 8:29:20 PM UTC-7, David Riley wrote:

On Apr 28, 2014, at 10:43 PM, John Monahan wrote:

> Not sure I understand what you have there Neil,
> Are you saying that if an equation has 16 terms you must have the outputs on either pins 18 or 19.
> But if the equation has only 8 terms any pin from 14 to 23 is OK.
> Do you mean “term” to be an input pin.
> John

A term is an individual AND term; the outputs of a PAL/GAL are the OR of a bunch of AND terms (e.g. (A & B) | (A & ~C)).  The AND terms can be composed of as many of the input pins or their complements as you wish, but you can only OR a limited number of them together for the output.  You can reuse the AND terms, though.

You might want to familiarize yourself with "sum of products" notation and how to decompose arbitrary boolean expressions into sums of products; that is what PALASM does internally (it's simple enough Boolean algebra that the minicomputers of the late '70s could do it symbolically without much trouble).  It will better inform you of what your equations are actually turning into, which should also let you know what limitations you'll run into per pin.

- Dave

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