Jumper | Function |
JP5 |
Normally closed. Generate the S100 bus MWRT signal on this board when it is active. |
JP4 | Normally closed. Generate the S100 bus 2MHz Clock signal on this board when it is active. |
JP23 |
Normally closed. Pulls SIXTN* high |
P11 | Normally not used.
Used to pull-up INT* if board is a bus master |
JP7,JP8, JP9,JP10 | Normally all open unless the board is a bus master. |
JP13 |
Normally open. Used if board wants to utilize the S100 bus
Phantom Line |
JP6 |
Normally closed. Allows code in CPLD to lower the S100 bus Reset
line |
JP1, JP2,
JP3 |
IEEE-696 GND lines, normally open. |
P28 | Normally
1-2, Defines how board utilizes the S100 bus Reset signal |
K1 |
Normally 2-3, Reset the CPLD |
P6 or P5 | CPLD JTAG programming socket.
(For Rockfield Research 1508 programmer use P5. Pin 1 is bottom left). |
P14,P15,P16 |
Jumpers for spare Edison I/O pins (5V), normally unconnected.
(only P14 seems to work in both directions) |
P8 |
S100 Bus TMA line to activate board. Normally 1-2 (also 3-4)
closed. |
P11 |
Inputs from S100 bus Interrupt vectors. Normally all open. |
SW1 |
This is a mini push button switch. Push once to stop the monitor
action. Push again to restart. |
K4 |
Lower the S100 bus HOLD* line. For slave mode jumper 2-3 |
P18 |
Check for a raised pHLDA in slave mode. Jumper 1-2. |
JP21 |
Normally open. Pullup line for bus master XRDY. |
P9 |
Close when the CPLD is programmed. Brings the
current S100 bus Phi signal into
the CPLD |